Renesas Hitachi H8S/2194 Series Hardware Manual page 564

Table 25.3 Flags and Transfer States
MST TRS BBSY ESTP STOP IRTR
1/0 1/0 0
1 1 0
1 1 1
1 1/0 1
1 1/0 1
0 0 1
0 0 1
0 0 1
0 0 1
0 1/0 1
0 1/0 1
0 1 1
0 1/0 0
Bit 0: Start Condition/Stop Condition Prohibit (SCP)
Controls the issuing of start and stop conditions in master mode. To issue a start condition, write
1 in BBSY and 0 in SCP. A retransmit start condition is issued in the same way. To issue a stop
condition, write 0 in BBSY and 0 in SCP. This bit is always read as 1. If 1 is written, the data is
not stored.
Bit 0
SCP Description
0 Writing 0 issues a start or stop condition, in combination with the BBSY flag
1 Reading always returns a value of 1
Writing is ignored
0 0 0
0 0 0
0 0 1
0 0 0
0 0 1
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 1
0 0 0
1/0 1/0 0
AASX AL AAS
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
1/0 1 1/0
0 0 1
0 0 1
1 0 0
0 0 0
1 0 0
1 0 0
0 0 0
ADZ ACKB State
0 0 Idle state (flag clearing
required)
0 0 Start condition
issuance
0 0 Start condition
established
0 0/1 Master mode wait
0 0/1 Master mode
transmit/receive end
1/0 0 Arbitration lost
0 0 SAR match by first
frame in slave mode
1 0 General call address
match
0 0 SARX match
0 0/1 Slave mode
transmit/receive end
(except after SARX
match)
0 0 Slave mode
0 1 transmit/receive end
(after SARX match)
0 0/1 Stop condition detected
(Initial value)
Rev. 2.0, 11/00, page 537 of 1037