Output Comparing Flag (Ocfa And Ocfb) Setting Up Timing; Overflow Flag (Cvf) Setting Up Timing - Renesas Hitachi H8S/2194 Series Hardware Manual

16-bit single-chip microcomputer
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17.3.7

Output Comparing Flag (OCFA and OCFB) Setting Up Timing

The OCFA and OCFB are being set to 1 by the comparing match signal being output when the
values of the OCRA, OCRB and FRC match. The comparing match signal is generated at the
last state of the value match (the timing of the FRC's updating the matching count reading).
After the values of the OCRA, OCRB and FRC match, up until the count up clock signal is
generated, the comparing match signal will not be issued. Figure 17.10 shows the OCFA and
OCFB setting timing chart.
FRC
OCRA, OCRB
Comparing match
signal
OCFA, OCFB
17.3.8

Overflow Flag (CVF) Setting Up Timing

The OVF is set to when the FRC overflows (H'FFFF → H'0000). Figure 17.11 shows the timing
chart for this case.
FRC
Overflowing
signal
OVF
N
N
Figure 17.10 OCF Setting Up Timing
H'FFFF
Figure 17.11 OVF Setting Up Timing
N+1
H'0000
Rev. 2.0, 11/00, page 381 of 1037

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