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ICDR is an 8-bit readable/writable register that is used as a transmit data register when
transmitting and a receive data register when receiving. ICDR is divided internally into a shift
register (ICDRS), receive buffer (ICDRR), and transmit buffer (ICDRT). ICDRS cannot be read
or written by the CPU, ICDRR is read-only, and ICDRT is write-only. Data transfers among the
three registers are performed automatically in coordination with changes in the bus state, and
affect the status of internal flags such as TDRE and RDRF.
2
After transmission/reception of one frame of data using ICDRS, if the I
C bus is in transmit
mode and the next data is in ICDRT (the TDRE flag is 0), data is transferred automatically from
2
ICDRT to ICDRS. After transmission/reception of one frame of data using ICDRS, if the I
C
bus is in receive mode and no previous data remains in ICDRR (the RDRF flag is 0), data is
transferred automatically from ICDRS to ICDRR.
Rev. 2.0, 11/00, page 522 of 1037
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