Renesas Hitachi H8S/2194 Series Hardware Manual page 967

H'D07C: Capstan 12-Bit PWM Data Register CPWDR: Capstan 12-Bit PWM
Bit : 15 14
— —
Initial value : 1 1
— —
R/W :
H'D080: CTL Control Register CTCR: CTL Circuit
Bit : 7
NT/PL
Initial value :
0
R/W :
W
Operating frequency select bits
FSLC
0
1
Note: * Don't care.
NTSC/PAL select bit
0 NTSC mode (frame rate: 30 Hz)
1 PAL mode (frame rate: 25 Hz)
Rev. 2.0, 11/00, page 940 of 1037
13 12 11 10
— —
CPWDR11 CPWDR10 CPWDR9
1 1 0 0
— —
R/W R/W
6 5 4
FSLC FSLB FSLA
0 1 1
W W W
FSLB FSLA Description
0 0 Reserved (do not set)
1 Reserved (do not set)
1 0 fosc = 8 MHz
1 fosc = 10 MHz (Initial value)
* * Reserved (do not set)
9 8 7 6
CPWDR8 CPWDR7 CPWDR6 CPWDR5
0 0 0 0
R/W R/W R/W R/W
3 2
CCS LCTL
0 0
W W
CTL undetected bit
0 Detected
1 Undetected
Long CTL bit
0 Clock source (CCS) operates at the setting value
1 Clock source (CCS) operates for further 8-division after
operating at the setting value
Clock source select bit
0 φs
1 φs/2
5 4 3 2
CPWDR4 CPWDR3 CPWDR2 CPWDR1
0 0 0 0
R/W R/W R/W R/W
1 0
UNCTL SLWM
0 0
R W
Mode select bit
0 Normal mode
1 Slow mode
1 0
CPWDR0
0 0
R/W R/W