Timing Of Overflow Flag (Ovf) Setting - Renesas H8S/2100 Series Hardware Manual

Section 12 8-Bit Timer (TMR)
12.5.6

Timing of Overflow Flag (OVF) Setting

The OVF bit in TCSR is set to 1 when the TCNT overflows (changes from H'FF to H'00). Figure
12.10 shows the timing of OVF flag setting.
φ
TCNT
Overflow signal
OVF
Rev. 1.00 May 09, 2008 Page 338 of 954
REJ09B0462-0100
H'FF
Figure 12.10 Timing of OVF Flag Setting
H'00