Timing Of Overflow Flag (Ovf) Setting - Renesas H8S/2100 Series Hardware Manual

16-bit single-chip microcomputer
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13.5.6

Timing of Overflow Flag (OVF) Setting

The OVF bit in TCSR is set to 1 when the TCNT overflows (changes from H'FF to H'00). Figure
13.10 shows the timing of OVF flag setting.
φ
TCNT
Overflow signal
OVF
H'FF
Figure 13.10 Timing of OVF Flag Setting
Section 13 8-Bit Timer (TMR)
H'00
Rev. 1.00 Apr. 28, 2008 Page 379 of 994
REJ09B0452-0100

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