Low-Power Modes; Slowing Down System Clocks; Table 13. Low-Power Mode Summary - STMicroelectronics STM32F05 series Reference Manual

RM0091
6.3

Low-power modes

By default, the microcontroller is in Run mode after a system or a power Reset. Several low-
power modes are available to save power when the CPU does not need to be kept running,
for example when waiting for an external event. It is up to the user to select the mode that
gives the best compromise between low-power consumption, short startup time and
available wakeup sources.
The device features three low-power modes:
●
Sleep mode (CPU clock off, all peripherals including Cortex-M0 core peripherals like
NVIC, SysTick, etc. are kept running)
●
Stop mode (all clocks are stopped)
●
Standby mode (1.8V domain powered-off)
In addition, the power consumption in Run mode can be reduce by one of the following
means:
● Slowing down the system clocks
●
Gating the clocks to the APB and AHB peripherals when they are unused.
Table 13.
Mode name
Sleep
(Sleep now or
Sleep-on -
exit)
Stop
Standby
6.3.1

Slowing down system clocks

In Run mode the speed of the system clocks (SYSCLK, HCLK, PCLK) can be reduced by
programming the prescaler registers. These prescalers can also be used to slow down
peripherals before entering Sleep mode.
For more details refer to
Low-power mode summary
Entry
WFI Any interrupt
WFE Wakeup event
Any EXTI line
(configured in the
EXTI registers)
PDDS and LPDS
Specific
bits +
communication
SLEEPDEEP bit
peripherals on
+ WFI or WFE
reception events
(CEC, USART,
I2C)
WKUP pin rising
PDDS bit + edge, RTC alarm,
SLEEPDEEP bit external reset in
+ WFI or WFE NRST pin,
IWDG reset
Section 7.4.2: Clock configuration register
Doc ID 018940 Rev 1
Effect on 1.8V
wakeup
domain clocks
CPU clock OFF
no effect on other
clocks or analog
clock sources
All 1.8V domain
clocks OFF
Power control (PWR)
Effect on
V Voltage
DD
domain regulator
clocks
None ON
ON or in low-
power mode
(depends on
Power control
HSI and
register
HSE
(PWR_CR))
oscillators
OFF
OFF
(RCC_CFGR).
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