Figure 2. Programming Procedure - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
Table of Contents

Advertisement

RM0091
Unlocking the Flash memory
After reset, the Flash memory is protected against unwanted write or erase operations. The
FLASH_CR register is not accessible in write mode. An unlocking sequence should be
written to the FLASH_KEYR register to open the access to the FLASH_CR register. This
sequence consists of two write operations:
Write KEY1 = 0x45670123
Write KEY2 = 0xCDEF89AB
Any wrong sequence locks up the FLASH_CR register until the next reset.
In the case of a wrong key sequence, a bus error is detected and a Hard Fault interrupt is
generated. This is done after the first write cycle if KEY1 does not match, or during the
second write cycle if KEY1 has been correctly written but KEY2 does not match.
The FLASH_CR register can be locked again by user software by writing the LOCK bit in the
FLASH_CR register to 1.
Main Flash memory programming
The main Flash memory can be programmed 16 bits at a time. The program operation is
started when the CPU writes a half-word into a main Flash memory address with the PG bit
of the FLASH_CR register set. Any attempt to write data that are not half-word long will
result in a bus error generating a Hard Fault interrupt.
Figure 2.
Programming procedure
Read LOCK bit in
FLASH_CR
LOCK bit in FLASH_CR
= 1
No
Write PG bit in FLASH_CR to 1
Perform half-word write at the
desired address
BSY bit in FLASH_SR
= 1
No
Check the programmed value
by reading the programmed
address
Doc ID 018940 Rev 1
Yes
Perform unlock sequence
Yes
Embedded Flash memory
MS19220V1
45/742

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F05 series and is the answer not in the manual?

Questions and answers

Table of Contents