RM0091
Note:
Please refer to the
of how to manage the dedicated 14 MHz internal oscillator. The ADC interface can
automatically switch ON/OFF the 14 MHz internal oscillator to save power.
Figure 34. Behavior withWAIT=0, AUTOFF=1
TRGx
EOC
EOSEQ
ADC_DR Read access
RDY Startup CH1
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL=TRGx, EXTEN=0x1 (rising edge), CONT=x, ADSTART=1, CHSEL=0xF, SCANDIR=0, WAIT=1,
AUTOFF=1
Figure 35. Behavior with WAIT=1, AUTOFF=1
TRGx
EOC
EOSEQ
ADC_DR Read access
ADC state
RDY Start
ADC_DR
by S/W
triggered
1. EXTSEL=TRGx, EXTEN=0x1 (rising edge), CONT=x, ADSTART=1, CHSEL=0xF, SCANDIR=0, WAIT=1,
AUTOFF=1
12.8
Analog window watchdog (AWDEN, AWDSGL, AWDCH,
AWD_HTR/LTR, AWD)
The AWD analog watchdog feature is enabled by setting the AWDEN bit in the
ADC_CFGR1 register. It is used to monitor that either one selected channel or all enabled
channels (see
voltage range (window) as shown in
Section 7: Reset and clock control (RCC) on page 82
CH2
CH3
D1
D2
by H/W
DLY
Start
CH1
OFF
up
D1
by H/W
Table 36: Analog watchdog channel
Doc ID 018940 Rev 1
CH4
D3
D4
DLY
Start
CH2
CH3
up
up
D2
selection) remain within a configured
Figure
36.
Analog-to-digital converter (ADC)
for the description
OFF
DLY
Start
OFF
up
D3
Startup
DLY
CH1
CH2
D4
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