Embedded Flash memory
3.5.8
Write protection register (FLASH_WRPR)
Address offset: 0x20
Reset value: 0xFFFF FFFF
31
30
29
15
14
13
3.6
Flash register map
Table 8.
Flash interface - register map and reset values
Offset
Register
FLASH_ACR
0x000
Reset value
FLASH_KEYR
0x004
Reset value
FLASH_OPTKEYR
0x008
Reset Value
FLASH_SR
0x00C
Reset value
FLASH_CR
0x010
Reset value
FLASH_AR
0x014
Reset value
FLASH_OBR
0x01C
Reset value
FLASH_WRPR
0x020
Reset value
Refer to
58/742
28
27
26
25
12
11
10
9
Bits 31:0 WRP: Write protect
This register contains the write-protection option bytes loaded by the OBL.
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
24
23
22
8
7
6
WRP[15:0]
FKEYR[31:0]
x
x
x
x
x
x
x
x
x
OPTKEYR[31:0]
x
x
x
x
x
x
x
x
x
FAR[31:0]
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
for the register boundary addresses.
21
20
19
18
5
4
3
2
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
WRP[15:0]
1
1
1
1
1
1
1
1
RM0091
17
16
1
0
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
x
x
x
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
1
1
1
Need help?
Do you have a question about the STM32F05 series and is the answer not in the manual?