Figure 134. Triggering Timer 2 With Update Of Timer 1 - STMicroelectronics STM32F05 series Reference Manual

General-purpose timers (TIM2 and TIM3)
Using one timer to start another timer
In this example, we set the enable of Timer 2 with the update event of Timer 1. Refer to
Figure 131
nonzero) on the divided internal clock as soon as the update event is generated by Timer 1.
When Timer 2 receives the trigger signal its CEN bit is automatically set and the counter
counts until we write '0 to the CEN bit in the TIM2_CR1 register. Both counter clock
frequencies are divided by 3 by the prescaler compared to CK_INT (f
●
Configure Timer 1 master mode to send its Update Event (UEV) as trigger output
(MMS=010 in the TIM1_CR2 register).
●
Configure the Timer 1 period (TIM1_ARR registers).
●
Configure Timer 2 to get the input trigger from Timer 1 (TS=000 in the TIM2_SMCR
register).
●
Configure Timer 2 in trigger mode (SMS=110 in TIM2_SMCR register).
●
Start Timer 1 by writing '1 in the CEN bit (TIM1_CR1 register).

Figure 134. Triggering timer 2 with update of timer 1

TIMER2-CEN=CNT_EN
As in the previous example, you can initialize both counters before starting counting.
Figure 135
mode instead of gated mode (SMS=110 in the TIM2_SMCR register).
326/742
for connections. Timer 2 starts counting from its current value (which can be
CK_INT
TIMER1-UEV
TIMER1-CNT
FD
TIMER2-CNT
TIMER 2-TIF
shows the behavior with the same configuration as in
Doc ID 018940 Rev 1
00
FE FF
45
Write TIF=0
= f
CK_CNT CK_INT
02
01
46 47 48
Figure 134 but in trigger
RM0091
/3).