Tim15 Counter (Tim15_Cnt); Tim15 Prescaler (Tim15_Psc); Tim15 Auto-Reload Register (Tim15_Arr) - STMicroelectronics STM32F05 series Reference Manual

RM0091
18.5.9

TIM15 counter (TIM15_CNT)

Address offset: 0x24
Reset value: 0x0000
15 14 13
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Bits 15:0 CNT[15:0]: Counter value
18.5.10

TIM15 prescaler (TIM15_PSC)

Address offset: 0x28
Reset value: 0x0000
15 14 13
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency (CK_CNT) is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event
(including when the counter is cleared through UG bit of TIMx_EGR register or through trigger
controller when configured in "reset mode").
18.5.11

TIM15 auto-reload register (TIM15_ARR)

Address offset: 0x2C
Reset value: 0x0000
15 14 13
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Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the
and behavior.
The counter is blocked while the auto-reload value is null.
12 11 10 9
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12 11 10 9
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12 11 10 9
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Section 17.3.1: Time-base unit on page 354
Doc ID 018940 Rev 1
General-purpose timers (TIM15/16/17)
8 7 6 5
CNT[15:0]
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8 7 6 5
PSC[15:0]
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CK_PSC
8 7 6 5
ARR[15:0]
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4 3 2
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4 3 2
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/ (PSC[15:0] + 1).
4 3 2
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for more details about ARR update
1 0
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1 0
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1 0
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