STMicroelectronics STM32F05 series Reference Manual page 280

Advanced arm-based 32-bit mcus
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Advanced-control timers (TIM1)
Bit 7 CC2NP: Capture/Compare 2 complementary output polarity
Bit 6 CC2NE: Capture/Compare 2 complementary output enable
Bit 5 CC2P: Capture/Compare 2 output polarity
Bit 4 CC2E: Capture/Compare 2 output enable
Bit 3 CC1NP: Capture/Compare 1 complementary output polarity
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
Bit 2 CC1NE: Capture/Compare 1 complementary output enable
Note: On channels having a complementary output, this bit is preloaded. If the CCPC bit is
280/742
refer to CC1NP description
refer to CC1NE description
refer to CC1P description
refer to CC1E description
CC1 channel configuration as output:
0: OC1N active high.
1: OC1N active low.
CC1 channel configuration as input:
This bit is used in conjunction with CC1P to define the polarity of TI1FP1 and TI2FP1. Refer
to CC1P description.
set in the TIMx_CR2 register then the CC1NP active bit takes the new value from the
preloaded bits only when a Commutation event is generated.
in TIMx_BDTR register) and CC1S="00" (the channel is configured in output).
0: Off - OC1N is not active. OC1N level is then function of MOE, OSSI, OSSR, OIS1, OIS1N
and CC1E bits.
1: On - OC1N signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1E bits.
set in the TIMx_CR2 register then the CC1NE active bit takes the new value from the
preloaded bits only when a Commutation event is generated.
Doc ID 018940 Rev 1
RM0091

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