Wakeup From Stop On Address Match; Figure 225. Bus Transfer Diagrams For Smbus Master Receiver - STMicroelectronics STM32F05 series Reference Manual

RM0091

Figure 225. Bus transfer diagrams for SMBus master receiver

Example SMBus master receiver 2 bytes + PEC, automatic end mode (STOP)
NBYTES
INIT: program Slave address, program NBYTES = 3, AUTOEND=1, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: rd PEC
Example SMBus master receiver 2 bytes + PEC, software end mode (RESTART)
INIT
NBYTES
xx
INIT: program Slave address, program NBYTES = 3, AUTOEND=0, set PECBYTE, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
EV3: RXNE ISR: read PEC
EV4: TC ISR: program Slave address, program NBYTES = N, set START
23.4.15

Wakeup from STOP on address match

This section is relevant only when Wakeup from STOP feature is supported. Please refer to
Section 23.3: I2C
The I2C is able to wakeup the MCU from STOP mode (APB clock is off), when it is
addressed. All addressing modes are supported.
Wakeup from STOP is enabled by setting the WUPEN bit in the I2Cx_CR1 register. The HSI
oscillator must be selected as the clock source for I2CCLK in order to allow wakeup from
STOP.
During STOP mode, the HSI is switched off. When a START is detected, the I2C interface
switches the HSI on, and stretches SCL low until HSI is woken up.
data1
S Address A
INIT
xx 3
RXNE
S Address A data1 A
EV1
3
implementation.
Doc ID 018940 Rev 1
Inter-integrated circuit (I
RXNE RXNE
PEC
data2
A A
E V 1 EV2
RXNE RXNE
data2 A PEC NA
EV2 EV3
RXNE
legend:
NA P
E V 3
legend:
TC
Restart
Address
EV4
N
2
C) interface
transmission
reception
SCL stretch
transmission
reception
SCL stretch
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