STMicroelectronics STM32F05 series Reference Manual page 221

Advanced arm-based 32-bit mcus
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RM0091
Bits 10:8 COMP1OUTSEL[2:0]: Comparator 1 output selection
Bit 7 Reserved, must be kept at reset value.
Bits 6:4 COMP1INSEL[2:0]: Comparator 1 inverting input selection
Bits 3:2 COMP1MODE[1:0]: Comparator 1 mode
Bit 1 COMP1SW1: Comparator 1 enable
Bit 0 COMP1EN: Comparator 1 enable
These bits selects the destination of the comparator 1 output.
000: no selection
001: Timer 1 break input
010: Timer 1 Input capture 1
011: Timer 1 OCrefclear input
100: Timer 2 input capture 4
101: Timer 2 OCrefclear input
110: Timer 3 input capture 1
111: Timer 3 OCrefclear input
These bits select the source connected to the inverting input of the comparator 1.
000: 1/4 of Vrefint
001: 1/2 of Vrefint
010: 3/4 of Vrefint
011: Vrefint
100: COMP1_INM4 (PA4 or DAC if enabled)
101: COMP1_INM5 (PA5)
110: COMP1_INM6 (PA0)
111: Reserved
These bits control the operating mode of the comparator1 and allows to adjust the
speed/consumption.
00: Ultra-low power
01: Low power
10: Medium speed
11: High speed
This bit closes a switch between comparator 1 non-inverting input on PA0 and PA4
(DAC) I/O.
0 : Switch open
1 : Switch closed
Note: This switch is solely intended to redirect signals onto high impedance input, such
as COMP1 non-inverting input (highly resistive switch).
This bit switches COMP1 ON/OFF.
0 : Comparator 1 disabled
1 : Comparator 1 enabled
Doc ID 018940 Rev 1
Comparator (COMP)
221/742

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