Figure 158. Counter Timing Diagram, Internal Clock Divided By 4; Figure 159. Counter Timing Diagram, Internal Clock Divided By N - STMicroelectronics STM32F05 series Reference Manual

General-purpose timers (TIM15/16/17)

Figure 158. Counter timing diagram, internal clock divided by 4

Figure 159. Counter timing diagram, internal clock divided by N

Figure 160. Counter timing diagram, update event when ARPE=0 (TIMx_ARR not
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CK_PSC
CNT_EN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
CK_PSC
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
preloaded)
CK_PSC
CEN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
Auto-reload register
Write a new value in TIMx_ARR
Doc ID 018940 Rev 1
0035
0036
1F 20
31 32 33 34 35 36 00 01 02 03 04 05 06 07
FF
RM0091
0000 0001
00
36