STMicroelectronics STM32F05 series Reference Manual page 675

RM0091
Bit 7 BSY: Busy flag
Note: The BSY flag must be used with caution: refer to
Bit 6 OVR: Overrun flag
Bit 5 MODF: Mode fault
Note: Not used in I
Bit 4 CRCERR: CRC error flag
Note: Not used in I
Bit 3 UDR: Underrun flag
Note: This bit is not used in SPI mode
Bit 2 CHSIDE: Channel side
Note: This bit is not used in the SPI mode. It has no significance in PCM mode
Bit 1 TXE: Transmit buffer empty
Bit 0 RXNE: Receive buffer not empty
0: SPI (or I2S) not busy
1: SPI (or I2S) is busy in communication or Tx buffer is not empty
This flag is set and cleared by hardware.
Procedure for disabling the SPI on page
0: No overrun occurred
1: Overrun occurred
This flag is set by hardware and reset by a software sequence. Refer to
page 668 for the software sequence.
0: No mode fault occurred
1: Mode fault occurred
This flag is set by hardware and reset by a software sequence. Refer to
page 648 for the software sequence.
2
S mode
0: CRC value received matches the SPIx_RXCRCR value
1: CRC value received does not match the SPIx_RXCRCR value
This flag is set by hardware and cleared by software writing 0.
2
S mode
0: No underrun occurred
1: Underrun occurred
This flag is set by hardware and reset by a software sequence. Refer to
page 668 for the software sequence.
0: Channel Left has to be transmitted or has been received
1: Channel Right has to be transmitted or has been received
0: Tx buffer not empty
1: Tx buffer empty
0: Rx buffer empty
1: Rx buffer not empty
Doc ID 018940 Rev 1
Serial peripheral interface / inter-IC sound (SPI/I2S)
Section 26.3.8: SPI Status flags
644.
and
I2S error flags on
Section 26.4 on
I2S error flags on
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