Dac Register Map; Table 41. Dac Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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Digital-to-analog converter (DAC1)
13.5.8

DAC register map

Table 41
Table 41.
DAC register map and reset values.
Address
Register
offset
name
DAC_CR
0x00
Reset value
DAC_
SWTRIGR
0x04
Reset value
DAC_DHR1
2R1
0x08
Reset value
DAC_DHR1
2L1
0x0C
Reset value
DAC_DHR8
R1
0x10
Reset value
DAC_DOR1
0x2C
Reset value
DAC_SR
0x34
Reset value
Refer to
214/742
summarizes the DAC registers.
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
0
0
0
0
0
for the register boundary addresses.
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
0
DACC1DHR[7:0]
0
0
0
DACC1DOR[11:0]
0
0
0
0
0
0
0
RM0091
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

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