Request Register (Usart_Rqr) - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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Universal synchronous asynchronous receiver transmitter (USART)
25.7.7

Request register (USART_RQR)

Address offset: 0x18
Reset value: 0x0000
31
30
29
Res
Res
Res
15
14
13
Res
Res
Res
Bits 31:5 Reserved, must be kept at reset value
Bit 4 TXFRQ: Transmit data flush request
Writing 1 to this bit sets the TXE flag.
This allows to discard the transmit data. This bit must be used only in Smartcard mode, when
data has not been sent due to errors (NACK) and the FE flag is active in the USART_ISR
register.
. If the USART does not support Smartcard mode, this bit is reserved and forced by hardware
to '0'. Please refer to
Bit 3 RXFRQ: Receive data flush request
Writing 1 to this bit clears the RXNE flag.
This allows to discard the received data without reading it, and avoid an overrun condition.
Bit 2 MMRQ: Mute mode request
Writing 1 to this bit puts the USART in mute mode and resets the RWU flag.
Bit 1 SBKRQ: Send break request
Writing 1 to this bit sets the SBKF flag and request to send a BREAK on the line, as soon as
the transmit machine is available.
Bit 0 ABRRQ: Auto baud rate request
Writing 1 to this bit resets the ABRF flag in the USART_ISR and request an automatic baud
rate measurement on the next received data frame.
Note: : If the USART does not support the auto baud rate feature, this bit is reserved and
624/742
28
27
26
25
Res
Res
Res
Res
12
11
10
9
Res
Res
Res
Res
Section 25.4: USART implementation on page
forced by hardware to '0'. Please refer to
page
573.
Doc ID 018940 Rev 1
24
23
22
21
Res
Res
Res
Res
8
7
6
5
Res
Res
Res
Res
Section 25.4: USART implementation on
20
19
18
17
Res
Res
Res
Res
4
3
2
TXFRQ RXFRQ MMRQ SBKRQ
w_r0
w_r0
w_r0
w_r0
573.
RM0091
16
Res
1
ABRR
Q
w_r0

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