Spi/I2S Register Map; Table 94. Spi Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Serial peripheral interface / inter-IC sound (SPI/I2S)
26.7.10

SPI/I2S register map

The Table 94
Table 94. SPI register map and reset values
Offset Register
SPIx_CR1
0x00
Reset value
SPIx_CR2
0x04
Reset value
SPIx_SR
0x08
Reset value
SPIx_DR
0x0C
Reset value
SPIx_CRCPR
0x10
Reset value
SPIx_RXCRCR
0x14
Reset value
SPIx_TXCRCR
0x18
Reset value
SPIx_I2SCFGR
0x1C
Reset value
SPIx_I2SPR
0x20
Reset value
Refer to
680/742
shows the SPI/I2S register map and reset values.
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
0 0
0 0
0 0
0 0
0 0
0 0
for the register boundary addresses.
BR [2:0]
0 0 0 0 0 0 0 0 0
DS[3:0]
0 0 1 1 1 0 0 0
0 0 0 0 0 0 0 0
DR[15:0]
0 0 0 0 0 0 0 0 0
CRCPOLY[15:0]
0 0 0 0 0 0 0 0 0
RxCRC[15:0]
0 0 0 0 0 0 0 0 0
TxCRC[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0
RM0091
0 0 0 0 0
0 0 0 0 0
0 0 0 1 0
0 0 0 0 0
0 0 1 1 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
I2SDIV
0 0 0 1 0