Gpio Port Bit Set/Reset Register (Gpiox_Bsrr) (X = A..d, F - STMicroelectronics STM32F05 series Reference Manual

General-purpose I/Os (GPIO)
8.4.7

GPIO port bit set/reset register (GPIOx_BSRR) (x = A..D, F)

Address offset: 0x18
Reset value: 0x0000 0000
31 30 29
BR15 BR14 BR13 BR12
w w w
15 14 13
BS15 BS14 BS13 BS12
w w w
Bits 31:16 BRy: Port x reset bit y (y = 0..15)
Note: If both BSx and BRx are set, BSx has priority.
Bits 15:0 BSy: Port x set bit y (y= 0..15)
130/742
28 27 26 25
BR11 BR10 BR9
w w w w
12 11 10 9
BS11 BS10 BS9
w w w w
These bits are write-only. A read to these bits returns the value 0x0000.
0: No action on the corresponding ODRx bit
1: Resets the corresponding ODRx bit
These bits are write-only. A read to these bits returns the value 0x0000.
0: No action on the corresponding ODRx bit
1: Sets the corresponding ODRx bit
Doc ID 018940 Rev 1
24 23 22 21
BR8 BR7 BR6 BR5
w w w w
8 7 6 5
BS8 BS7 BS6 BS5
w w w w
20 19 18 17
BR4 BR3 BR2 BR1
w w w w
4 3 2 1
BS4 BS3 BS2 BS1
w w w w
RM0091
16
BR0
w
0
BS0
w