RM0091
12.12.11 ADC register map
The following table summarizes the ADC registers.
Table 38.
ADC register map and reset values
Offset
Register
ADC_ISR
0x00
Reset value
ADC_IER
0x04
Reset value
ADC_CR
0x08
Reset value
0
ADC_CFGR1
0x0C
Reset value
ADC_CFGR2
0x10
Reset value
0
ADC_SMPR
0x14
Reset value
0x18
Reserved
0x1C
Reserved
ADC_TR
0x20
Reset value
0x24
Reserved
ADC_CHSELR
0x28
Reset value
0x2C
0x30
0x34
Reserved
0x38
0x3C
ADC_DR
0x40
Reset value
AWDCH[4:0]
0
0
0
0
0
0
0
0
HT[11:0]
1
1
1
1
1
1
Doc ID 018940 Rev 1
Analog-to-digital converter (ADC)
0
0
0
0
Reserved
Reserved
1
1
1
1
1
1
Reserved
0
0
0
0
0
0
Reserved
0
0
0
0
0
0
0
0
EXTSEL
RES
[2:0]
[1:0]
0
0
0
0
0
0
0
0
LT[11:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DATA[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SMPR
[2:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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