Interrupt Flag Clear Register (Usart_Icr) - STMicroelectronics STM32F05 series Reference Manual

RM0091
Bit 2 NF: Noise detected flag
Note: 1. This bit does not generate an interrupt as it appears at the same time as the RXNE
Bit 1 FE: Framing error
Bit 0 PE: Parity error
25.7.9

Interrupt flag clear register (USART_ICR)

Address offset: 0x20
Reset value: 0x0000
31 30 29
Res Res Res
15 14 13
Res Res Res EOBCF RTOCF
w_r0
Bits 31:21 Reserved, must be kept at reset value.
Bit 20 WUCF: Wakeup from Stop mode clear flag
Note: If the USART does not support the wakeup from Stop feature, this bit is reserved and
Bits 19:18 Reserved, must be kept at reset value.
Bit 17 CMCF: Character match clear flag
Bits 16:13 Reserved, must be kept at reset value.
Universal synchronous asynchronous receiver transmitter (USART)
This bit is set by hardware when noise is detected on a received frame. It is cleared by
software, writing 1 to the NFCF bit in the USART_ICR register.
0: No noise is detected
1: Noise is detected
bit which itself generates an interrupt. An interrupt is generated when the NF flag is set
during multi buffer communication if the EIE bit is set.
2. When the line is noise-free, the NF flag can be disabled by programming the
ONEBIT bit to 1 to increase the USART tolerance to deviations (Refer to
Section 25.5.5: Tolerance of the USART receiver to clock deviation on page
This bit is set by hardware when a de-synchronization, excessive noise or a break character
is detected. It is cleared by software, writing 1 to the FECF bit in the USART_ICR register.
In Smartcard mode, in transmission, this bit is set when the maximum number of transmit
attempts is reached without success (the card NACKs the data frame).
An interrupt is generated if EIE = 1 in the USART_CR1 register.
0: No Framing error is detected
1: Framing error or break character is detected
This bit is set by hardware when a parity error occurs in receiver mode. It is cleared by
software, writing 1 to the PECF in the USART_ICR register.
An interrupt is generated if PEIE = 1 in the USART_CR1 register.
0: No parity error
1: Parity error
28 27 26 25
Res Res Res Res
12 11 10 9
Res CTSCF LBDCF
w_r0 w_r0
Writing 1 to this bit clears the WUF flag in the USART_ISR register.
forced by hardware to '0'.
Writing 1 to this bit clears the CMF flag in the USART_ISR register.
Doc ID 018940 Rev 1
24 23 22 21
Res Res Res Res
8 7 6 5
Res TCCF Res
w_r0 w_r0
20 19 18 17
WUCF Res Res CMCF
w_r0 w_r0
4 3 2
IDLEC
ORECF NCF FECF
F
w_r0 w_r0 w_r0 w_r0
587).
16
Res
1 0
PECF
w_r0
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