Sw-Ap Registers; Core Debug; Table 112. 32-Bit Debug Port Registers Addressed Through The Shifted Value A[3:2]; Table 113. Core Debug Registers - STMicroelectronics STM32F05 series Reference Manual

RM0091
29.5.6

SW-AP registers

Access to these registers are initiated when APnDP=1
There are many AP Registers addressed as the combination of:
●
The shifted value A[3:2]
● The current value of the DP SELECT register.

Table 112. 32-bit debug port registers addressed through the shifted value A[3:2]

Address A(3:2) value
0x0
0x4
0x8
0xC
29.6

Core debug

Core debug is accessed through the core debug registers. Debug access to these registers
is by means of the debug access port. It consists of four registers:

Table 113. Core debug registers

Register
DHCSR
DCRSR
DCRDR
DEMCR
00 Reserved, must be kept at reset value.
DP CTRL/STAT register. Used to:
– Request a system or debug power-up
01 – Configure the transfer operation for AP accesses
– Control the pushed compare and pushed verify operations.
– Read some status flags (overrun, power-up acknowledges)
DP SELECT register: Used to select the current access port and the
active 4-words register window.
– Bits 31:24: APSEL: select the current AP
10 – Bits 23:8: reserved
– Bits 7:4: APBANKSEL: select the active 4-words register window on the
current AP
– Bits 3:0: reserved
DP RDBUFF register: Used to allow the debugger to get the final result
11 after a sequence of operations (without requesting new JTAG-DP
operation)
The 32-bit Debug Halting Control and Status Register
This provides status information about the state of the processor enable core debug
halt and step the processor
The 17-bit Debug Core Register Selector Register:
This selects the processor register to transfer data to or from.
The 32-bit Debug Core Register Data Register:
This holds data for reading and writing registers to and from the processor selected
by the DCRSR (Selector) register.
The 32-bit Debug Exception and Monitor Control Register:
This provides Vector Catching and Debug Monitor Control.
Doc ID 018940 Rev 1
Debug support (DBG)
Description
Description
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