Usart Interrupts; Table 89. Usart Interrupt Requests - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0091
25.6

USART interrupts

Table 89.
Transmit data register empty
CTS interrupt
Transmission Complete
Receive data register not empty (data ready to be read)
Overrun error detected
Idle line detected
Parity error
LIN break
Noise Flag, Overrun error and Framing Error in multibuffer
communication.
Character match
Receiver timeout error
End of Block
Wakeup from Stop mode
1. The WUF interrupt is active only in Stop mode.
The USART interrupt events are connected to the same interrupt vector (see
During transmission: Transmission Complete, Clear to Send, Transmit Data Register
empty or Framing error (in Smartcard mode) interrupt.
During reception: Idle Line detection, Overrun error, Receive data register not empty,
Parity error, LIN break detection, Noise Flag (only in multi buffer communication),
Framing Error (only in multi buffer communication), Character match, etc.
These events generate an interrupt if the corresponding Enable Control Bit is set.
Universal synchronous asynchronous receiver transmitter (USART)
USART interrupt requests
Interrupt event
Doc ID 018940 Rev 1
Enable
Event flag
Control bit
TXE
TXEIE
CTSIF
CTSIE
TC
TCIE
RXNE
RXNEIE
ORE
IDLE
IDLEIE
PE
PEIE
LBDF
LBDIE
NF or ORE or FE EIE
CMF
CMIE
RTOF
RTOIE
EOBF
EOBIE
(1)
WUF
WUFIE
Figure
252).
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