General-purpose timers (TIM15/16/17)
18.6.8
TIM16 and TIM17 counter (TIM16_CNT and TIM17_CNT)
Address offset: 0x24
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0
CNT[15:0]: Counter value
18.6.9
TIM16 and TIM17 prescaler (TIM16_PSC and TIM17_PSC)
Address offset: 0x28
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency (CK_CNT) is equal to f
PSC contains the value to be loaded in the active prescaler register at each update event
(including when the counter is cleared through UG bit of TIMx_EGR register or through trigger
controller when configured in "reset mode").
18.6.10
TIM16 and TIM17 auto-reload register (TIM16_ARR and TIM17_ARR)
Address offset: 0x2C
Reset value: 0x0000
15
14
13
rw
rw
rw
Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the
and behavior.
The counter is blocked while the auto-reload value is null.
432/742
12
11
10
9
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
12
11
10
9
rw
rw
rw
rw
Section 17.3.1: Time-base unit on page 354
Doc ID 018940 Rev 1
8
7
6
5
CNT[15:0]
rw
rw
rw
rw
8
7
6
5
PSC[15:0]
rw
rw
rw
rw
CK_PSC
8
7
6
5
ARR[15:0]
rw
rw
rw
rw
4
3
2
rw
rw
rw
4
3
2
rw
rw
rw
/ (PSC[15:0] + 1).
4
3
2
rw
rw
rw
for more details about ARR update
RM0091
1
0
rw
rw
1
0
rw
rw
1
0
rw
rw
Need help?
Do you have a question about the STM32F05 series and is the answer not in the manual?