Standby Mode; Table 16. Stop Mode - STMicroelectronics STM32F05 series Reference Manual

Power control (PWR)
●
real-time clock (RTC): this is configured by the RTCEN bit in the
register (RCC_BDCR)
●
Internal RC oscillator (LSI): this is configured by the LSION bit in the
register
●
External 32.768 kHz oscillator (LSE): this is configured by the LSEON bit in the
domain control register
The ADC or DAC can also consume power during Stop mode, unless they are disabled
before entering this mode. Refer to
register (DAC_CR)
Exiting Stop mode
Refer to
When exiting Stop mode by issuing an interrupt or a wakeup event, the HSI oscillator is
selected as system clock.
When the voltage regulator operates in low-power mode, an additional startup delay is
incurred when waking up from Stop mode. By keeping the internal regulator ON during Stop
mode, the consumption is higher although the startup time is reduced.
Table 16.
Stop mode
Mode entry
Mode exit
Wakeup latency
6.3.5

Standby mode

The Standby mode allows to achieve the lowest power consumption. It is based on the
Cortex-M0 deepsleep mode, with the voltage regulator disabled. The 1.8 V domain is
consequently powered off. The PLL, the HSI oscillator and the HSE oscillator are also
switched off. SRAM and register contents are lost except for registers in the Backup domain
and Standby circuitry (see
74/742
(RCC_CSR).
(RCC_BDCR).
for details on how to disable them.
Table 16 for more details on how to exit Stop mode.
Stop mode
WFI (Wait for Interrupt) or WFE (Wait for Event) while:
– Set SLEEPDEEP bit in Cortex-M0 System Control register
– Clear PDDS bit in Power Control register (PWR_CR)
– Select the voltage regulator mode by configuring LPDS bit in PWR_CR
Note: To enter Stop mode, all EXTI Line pending bits (in
(EXTI_PR)) and RTC Alarm flag must be reset. Otherwise, the Stop mode
entry procedure is ignored and program execution continues.
If WFI was used for entry:
– Any EXTI Line configured in Interrupt mode (the corresponding EXTI
Interrupt vector must be enabled in the NVIC).
– Some specific communication peripherals (CEC, USART, I2C) interrupts,
when programmed in wakeup mode (the peripheral must be programmed
in wakeup mode and the corresponding interrupt vector must be enabled
in the NVIC).
Refer to
If WFE was used for entry:
Any EXTI Line configured in event mode. Refer to
Wakeup event management on page 160
HSI wakeup time + regulator wakeup time from Low-power mode
Figure
Doc ID 018940 Rev 1
ADC control register (ADC_CR)
Description
Table 27: Vector table.
6).
RM0091
Backup domain control
Control/status
Backup
and DAC control
Pending register
Section 11.2.3: