Usart Register Map; Table 90. Usart Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0091
25.7.12

USART register map

The table below gives the USART register map and reset values.
Table 90.
USART register map and reset values
Offset
Register
USART_CR1
0x00
Reset value
USART_CR2
0x04
Reset value
0
USART_CR3
0x08
Reset value
0x0C
USART_BRR
Reset value
USART_GTPR
0x10
Reset value
USART_RTOR
0x14
Reset value
0
USART_RQR
0x18
Reset value
USART_ISR
0x1C
Reset value
USART_ICR
0x20
Reset value
USART_RDR
0x24
Reset value
USART_TDR
0x28
Reset value
Refer to
Universal synchronous asynchronous receiver transmitter (USART)
0
0
0
0
0
ADD[7:4]
ADD[3:0]
0
0
0
0
0
0
0
0
0
BLEN[7:0]
0
0
0
0
0
0
0
0
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SCAR
WUS
[1:0]
CNT2:0]
0
0
0
0
0
0
00 00 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
for the register boundary addresses.
0
0
0
0
0
0
0
0
STOP
[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BRR[15:4]
0
0
0
0
0
0
0
0
GT[7:0]
0
0
0
0
0
0
0
0
RTO[23:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
RDR[8:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BRR[3:0]
0
0
0
0
0
0
PSC[7:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TDR[8:0]
0
0
0
0
0
0
633/742

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