Clock Sources; Figure 111. Control Circuit In Normal Mode, Internal Clock Divided By 1 - STMicroelectronics STM32F05 series Reference Manual

General-purpose timers (TIM2 and TIM3)
16.3.3

Clock sources

The counter clock can be provided by the following clock sources:
●
Internal clock (CK_INT)
●
External clock mode1: external input pin (TIx)
●
External clock mode2: external trigger input (ETR)
●
Internal trigger inputs (ITRx): using one timer as prescaler for another timer, for
example, you can configure Timer 1 to act as a prescaler for Timer 2. Refer to
one timer as prescaler for another on page 323
Internal clock source (CK_INT)
If the slave mode controller is disabled (SMS=000 in the TIMx_SMCR register), then the
CEN, DIR (in the TIMx_CR1 register) and UG bits (in the TIMx_EGR register) are actual
control bits and can be changed only by software (except UG which remains cleared
automatically). As soon as the CEN bit is written to 1, the prescaler is clocked by the internal
clock CK_INT.
Figure 111
without prescaler.

Figure 111. Control circuit in normal mode, internal clock divided by 1

Counter clock = CK_CNT = CK_PSC
External clock source mode 1
This mode is selected when SMS=111 in the TIMx_SMCR register. The counter can count
at each rising or falling edge on a selected input.
304/742
shows the behavior of the control circuit and the upcounter in normal mode,
CK_INT
CEN=CNT_EN
UG
CNT_INIT
COUNTER REGISTER
Doc ID 018940 Rev 1
for more details.
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RM0091
: Using