STMicroelectronics STM32F05 series Reference Manual page 41

Advanced arm-based 32-bit mcus
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RM0091
The values on both BOOT0 pin and nBOOT1 bit are latched on the 4th rising edge of
SYSCLK after a reset. It is up to the user to set nBOOT1 and BOOT0 to select the required
boot mode.
The BOOT0 pin and nBOOT1 bit are also re-sampled when exiting from Standby mode.
Consequently they must be kept in the required Boot mode configuration in Standby mode.
After this startup delay has elapsed, the CPU fetches the top-of-stack value from address
0x0000 0000, then starts code execution from the boot memory at 0x0000 0004.
Depending on the selected boot mode, main Flash memory, system memory or SRAM is
accessible as follows:
Boot from main Flash memory: the main Flash memory is aliased in the boot memory
space (0x0000 0000), but still accessible from its original memory space
(0x0800 0000). In other words, the Flash memory contents can be accessed starting
from address 0x0000 0000 or 0x0800 0000.
Boot from system memory: the system memory is aliased in the boot memory space
(0x0000 0000), but still accessible from its original memory space (0x
Boot from the embedded SRAM: the SRAM is aliased in the boot memory space
(0x0000 0000), but it is still accessible from its original memory space (0x2000 0000).
Embedded boot loader
The embedded boot loader is located in the System memory, programmed by ST during
production. It is used to reprogram the Flash memory with the USART1 interface.
Doc ID 018940 Rev 1
).
1FFF EC00
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