Port Bit Reset Register (Gpiox_Brr) (X=A; Gpio Register Map; Table 21. Gpio Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

RM0091
8.4.11 Port bit reset register (GPIOx_BRR) (x=A..D, F)
Address offset: 0x28
Reset value: 0x0000 0000
31 30 29
15 14 13
BR15 BR14 BR13 BR12
w w w
Bits 31:16
Bits 15:0 BRy: Port x Reset bit y (y= 0 .. 15)
8.4.12

GPIO register map

The following table gives the GPIO register map and reset values.
Table 21. GPIO register map and reset values
Offset Register
GPIOA_MODER
0x00
Reset value
GPIOx_MODER
(where x =B..D, F)
0x00
Reset value
GPIOx_OTYPER
(where x =A..D, F)
0x04
Reset value
GPIOx_OSPEEDR
(where x =A..D, F)
0x08
Reset value
GPIOA_PUPDR
0x0C
Reset value
28 27 26 25
12 11 10 9
BR11 BR10 BR9
w w w w
Reserved
These bits are write-only. A read to these bits returns the value 0x0000
0: No action on the corresponding ODRx bit
1: Reset the corresponding ODRx bit
0 0 1 0 1 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 1 0 0 1 0 0
Doc ID 018940 Rev 1
24 23 22
Reserved
8 7 6
BR8 BR7 BR6
w w w
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
General-purpose I/Os (GPIO)
21 20 19 18
5 4 3 2
BR5 BR4 BR3 BR2
w w w w
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
17 16
1 0
BR1 BR0
w w
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
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