Own Address 1 Register (I2Cx_Oar1) - STMicroelectronics STM32F05 series Reference Manual

Inter-integrated circuit (I
Bits 9:8 SADD[9:8]: Slave address bit 9:8 (master mode)
Note: Changing these bits when the START bit is set is not allowed.
Bits 7:1 SADD[7:1]: Slave address bit 7:1 (master mode)
Note: Changing these bits when the START bit is set is not allowed.
Bit 0 SADD0: Slave address bit 0 (master mode)
Note: Changing these bits when the START bit is set is not allowed.
23.7.3

Own address 1 register (I2Cx_OAR1)

Address offset: 0x08
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
OA1EN Res. Res. Res.
rw
Bits 31:16 Reserved, must be kept at reset value.
Bit 15 OA1EN: Own Address 1 enable
0: Own address 1 disabled. The received slave address OA1 is NACKed.
1: Own address 1 enabled. The received slave address OA1 is ACKed.
Bits 14:11 Reserved, must be kept at reset value.
Bit 10 OA1MODE Own Address 1 10-bit mode
0: Own address 1 is a 7-bit address.
1: Own address 1 is a 10-bit address.
Note: This bit can be written only when OA1EN=0.
Bits 9:8 OA1[9:8]: Interface address
7-bit addressing mode: don't care
10-bit addressing mode: bits 9:8 of address
Note: These bits can be written only when OA1EN=0.
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C) interface
In 7-bit addressing mode (ADD10 = 0):
These bits are don't care
In 10-bit addressing mode (ADD10 = 1):
These bits should be written with bits 9:8 of the slave address to be sent
In 7-bit addressing mode (ADD10 = 0):
These bits should be written with the 7-bit slave address to be sent
In 10-bit addressing mode (ADD10 = 1):
These bits should be written with bits 7:1 of the slave address to be sent.
In 7-bit addressing mode (ADD10 = 0):
This bit is don't care
In 10-bit addressing mode (ADD10 = 1):
This bit should be written with bit 0 of the slave address to be sent
28 27 26 25
Res. Res. Res.
12 11 10 9
OA1
Res. OA1[9:8]
MODE
rw
Doc ID 018940 Rev 1
24 23 22
Res. Res. Res.
8 7 6
rw
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
OA1[7:1]
rw
RM0091
17 16
Res. Res.
1 0
OA1[0]
rw