Dma Register Map; Table 26. Dma Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

RM0091
10.4.7

DMA register map

The following table gives the DMA register map and the reset values.
Table 26. DMA register map and reset values
Offset Register
DMA_ISR
0x000
Reset value 0
DMA_IFCR
0x004
Reset value 0
DMA_CCR1
0x008
Reset value 0
DMA_CNDTR1
0x00C
Reset value 0
DMA_CPAR1
0x010
Reset value 0
DMA_CMAR1
0x014
Reset value 0
DMA_CCR2
0x01C
Reset value 0
DMA_CNDTR2
0x020
Reset value 0
DMA_CPAR2
0x024
Reset value 0
DMA_CMAR2
0x028
Reset value 0
DMA_CCR3
0x030
Reset value 0
DMA_CNDTR3
0x034
Reset value 0
DMA_CPAR3
0x038
Reset value 0
DMA_CMAR3
0x03C
Reset value 0
DMA_CCR4
0x044
Reset value 0
DMA_CNDTR4
0x048
Reset value 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Doc ID 018940 Rev 1
Direct memory access controller (DMA)
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
MA[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PL
[1:0]
0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PL
[1:0]
0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PL
[1:0]
0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
PL
[1:0]
0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
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