Transmit Data Register (I2Cx_Txdr) - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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RM0091
23.7.11

Transmit data register (I2Cx_TXDR)

Address offset: 0x28
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
Res.
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 TXDATA[7:0] 8-bit transmit data
Note: These bits can be written only when TXE=1.
28
27
26
25
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Data byte to be transmitted to the I2C bus.
Doc ID 018940 Rev 1
Inter-integrated circuit (I
24
23
22
21
Res.
Res.
Res.
Res.
8
7
6
5
Res.
2
C) interface
20
19
18
17
Res.
Res.
Res.
Res.
4
3
2
1
TXDATA[7:0]
rw
16
Res.
0
533/742

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