Tim16 And Tim17 Capture/Compare Enable Register; Tim17_Ccer) - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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General-purpose timers (TIM15/16/17)
18.6.7
TIM16 and TIM17 capture/compare enable register (TIM16_CCER and

TIM17_CCER)

Address offset: 0x20
Reset value: 0x0000
15
14
13
Res.
Res.
Res.
Res.
Bits 15:4 Reserved, always read as 0.
Bit 3 CC1NP: Capture/Compare 1 complementary output polarity
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
Bit 2 CC1NE: Capture/Compare 1 complementary output enable
Bit 1 CC1P: Capture/Compare 1 output polarity
Note: This bit is not writable as soon as LOCK level 2 or 3 has been programmed (LOCK bits
Bit 0 CC1E: Capture/Compare 1 output enable
430/742
12
11
10
9
Res.
Res.
Res.
0: OC1N active high
1: OC1N active low
in TIMx_BDTR register) and CC1S="00" (the channel is configured in output).
0: Off - OC1N is not active. OC1N level is then function of MOE, OSSI, OSSR, OIS1, OIS1N
and CC1E bits.
1: On - OC1N signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1E bits.
CC1 channel configured as output:
0: OC1 active high
1: OC1 active low
CC1 channel configured as input:
The CC1NP/CC1P bits select the polarity of TI1FP1 and TI2FP1 for capture operation.
00: Non-inverted/rising edge: circuit is sensitive to TIxFP1's rising edge TIxFP1 is not
inverted.
01: Inverted/falling edge: circuit is sensitive to TIxFP1's falling edge, TIxFP1 is inverted.
10: Reserved, do not use this configuration.
11: Non-inverted/both edges: circuit is sensitive to both the rising and falling edges of
TIxFP1, TIxFP1 is not inverted.
in TIMx_BDTR register)
CC1 channel configured as output:
0: Off - OC1 is not active. OC1 level is then function of MOE, OSSI, OSSR, OIS1, OIS1N
and CC1NE bits.
1: On - OC1 signal is output on the corresponding output pin depending on MOE, OSSI,
OSSR, OIS1, OIS1N and CC1NE bits.
CC1 channel configured as input:
This bit determines if a capture of the counter value can actually be done into the input
capture/compare register 1 (TIMx_CCR1) or not.
0: Capture disabled
1: Capture enabled
Doc ID 018940 Rev 1
8
7
6
5
Res.
Res.
Res.
Res.
4
3
2
1
Res.
CC1NP CC1NE
CC1P
rw
rw
rw
RM0091
0
CC1E
rw

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