Figure 152. Tim15 Block Diagram - STMicroelectronics STM32F05 series Reference Manual

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Figure 152. TIM15 block diagram

CK_TIM1121314151617 from RCC
TI1
TIMx_CH1
TI2
TIMx_CH2
BRK
Polarity selection
TIMx_BKIN
Clock failure event from clock controller
CSS (clock security system
Internal clock (CK_INT)
ITR0
ITR1
ITR2
ITR3
TI1F_ED
CK_PSC
Prescaler
TI1FP1
IC1
TI1FP2
Input filter &
Edge detector
TRC
TI2FP1 IC2
Input filter &
TI2FP2
Edge detector
TRC
BI
Doc ID 018940 Rev 1
General-purpose timers (TIM15/16/17)
TGI
ITR
TRC
TRGI
TI1FP1
TI2FP2
U
Auto-reload register
Stop, clear up/down
or
CNT
PSC
CK_CNT
+/-
counter
CC1I
U
IC1PS
Prescaler Capture/Compare 1 register
CC2I
U
IC2PS
Prescaler
Capture/Compare 2 register
Notes:
Preload registers transferred
Reg
to active registers on U event
according to control bit
event
interrupt & DMA output
Trigger
controller
TRGO
to other timers
Slave
Reset, enable, up, count
mode
controller
REP register
Repetition
counter
DTG registers
CC1I
OC1REF
output
DTG
control
CC2I
OC2REF
output
control
UI
U
TIMx_CH1
OC1
TIMx_CH1N
OC1N
OC2
TIMx_CH2
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