Arbitration; Figure 292. Bit Timings; Figure 293. Signal Free Time; Figure 294. Arbitration Phase - STMicroelectronics STM32F05 series Reference Manual

HDMI-CEC controller (HDMI-CEC)

Figure 292. Bit timings

START BIT
DATA BIT
INITIATOR LOGICAL 0
DATA BIT
INITIATOR LOGICAL 1
DATA BIT
FOLLOWER LOGICAL 0
28.4

Arbitration

All devices that wish to transmit - or retransmit - a message onto the CEC line have to
ensure that it has been inactive for a number of bit periods. This signal free time is defined
as the time starting from the final bit of the previous frame and depends on the initiating
device and the current status as shown in the table below.

Figure 293. Signal free time

Since only one initiator is allowed at any one time, an arbitration mechanism is provided to
avoid conflict when more than one initiator begins transmitting at the same time.
CEC line arbitration commences with the leading edge of the start bit and continues until the
end of the initiator address bits within the header block. During this period, the initiator shall
monitor the CEC line, if whilst driving the line to high impedance it reads it back to 0, it then
assumes it has lost arbitration, stops transmitting and becomes a follower.

Figure 294. Arbitration phase

high impedance
702/742
high impedance
low impedance
2.4ms +/-0.35ms
high impedance
low impedance
2.4ms +/-0.35ms
0.6ms +/-0.2ms
high impedance
low impedance
2.4ms +/-0.35ms
0.35ms max
high impedance
low impedance
PREVIOUS MESSAGE
Arbitration Phase
START
INITIATOR[3:0]
BIT
Doc ID 018940 Rev 1
4.5ms +/-0.2ms
3.7ms +/-0.2ms
1.5ms +/-0.2ms
Signal Free Time
DESTINATION[3:0]
NEW MESSAGE
EOM ACK
RM0091