Figure 205. Transfer Bus Diagrams For I2C Slave Transmitter - STMicroelectronics STM32F05 series Reference Manual

Inter-integrated circuit (I

Figure 205. Transfer bus diagrams for I2C slave transmitter

Example I2C slave transmitter 3 bytes with 1st data flushed,
NOSTRETCH=0:
S Address
TXE
EV1: ADDR ISR: check ADDCODE and DIR, set TXE, set ADDRCF
EV2: TXIS ISR: wr data1
EV3: TXIS ISR: wr data2
EV4: TXIS ISR: wr data3
EV5: TXIS ISR: wr data4 (not sent)
Example I2C slave transmitter 3 bytes without 1st data flush,
NOSTRETCH=0:
S Address
TXE
EV1: ADDR ISR: check ADDCODE and DIR, set ADDRCF
EV2: TXIS ISR: wr data2
EV3: TXIS ISR: wr data3
EV4: TXIS ISR: wr data4 (not sent)
Example I2C slave transmitter 3 bytes, NOSTRETCH=1:
EV1
TXE
EV1: wr data1
EV2: TXIS ISR: wr data2
EV3: TXIS ISR: wr data3
EV4: TXIS ISR: wr data4 (not sent)
EV5: STOPF ISR: (optional: set TXE and TXIS), set STOPCF
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2
C) interface
ADDR TXIS
TXIS
data1
A
EV2 EV3
EV1
TXIS
TXIS
ADDR
data1
A
A
EV2
EV1
TXIS
data1
Address A
S
EV2
Doc ID 018940 Rev 1
TXIS TXIS
data2 data3
A A
EV4 EV5
TXIS
data2 data3
A
EV3 EV4
TXIS
TXIS
data2 data3
A A
EV3 EV4
legend:
SCL stretch
NA P
legend :
SCL stretch
NA P
legend:
transmission
STOPF
reception
SCL stretch
NA P
EV5
RM0091
transmission
reception
transmission
reception
MS19853V1