Iwdg Register Map; Table 59. Iwdg Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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Independent watchdog (IWDG)
21.4.6

IWDG register map

The following table gives the IWDG register map and reset values.
Table 59.
IWDG register map and reset values
Offset
Register
IWDG_KR
0x00
Reset value
IWDG_PR
0x04
Reset value
IWDG_RLR
0x08
Reset value
IWDG_SR
0x0C
Reset value
IWDG_WINR
0x10
Reset value
Refer to
460/742
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
0
0
0
for the register boundary addresses.
KEY[15:0]
0
0
0
0
0
0
0
0
0
RL[11:0]
1
1
1
1
1
1
1
1
WIN[11:0]
1
1
1
1
1
1
1
1
RM0091
0
0
0
0
PR[2:0]
0
0
0
1
1
1
1
0
0
0
1
1
1
1

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