Debug Support (Dbg); Overview - STMicroelectronics STM32F05 series Reference Manual

Debug support (DBG)

29 Debug support (DBG)
This section applies to the whole STM32F05xxx family, unless otherwise specified.
29.1

Overview

The STM32F05xxx devices are built around a Cortex-M0 core which contains hardware
extensions for advanced debugging features. The debug extensions allow the core to be
stopped either on a given instruction fetch (breakpoint) or data access (watchpoint). When
stopped, the core's internal state and the system's external state may be examined. Once
examination is complete, the core and the system may be restored and program execution
resumed.
The debug features are used by the debugger host when connecting to and debugging the
STM32F05xxx MCUs.
One interface for debug is available:
●
Serial wire
Figure 299. Block diagram of STM32F05xxx MCU and Cortex-M0-level debug support
SWDIO
SWCLK
1. The debug features embedded in the Cortex-M0 core are a subset of the ARM CoreSight Design Kit.
718/742
STM32 MCU debug suppo rt
Cortex-M0 debug support
Cortex-M0
Core
SW-DP
Debug AP
Doc ID 018940 Rev 1
Bus matrix
Debug AP
Bridge
NVIC
DWT
BPU
RM0091
System
interface
DBGMCU
MS19240V1