Figure 29. Single Conversions Of A Sequence, Hardware Trigger; Figure 30. Continuous Conversions Of A Sequence, Hardware Trigger - STMicroelectronics STM32F05 series Reference Manual

Analog-to-digital converter (ADC)

Figure 29. Single conversions of a sequence, hardware trigger

(1)
ADSTART
EOC
EOSEQ
(1)
TRGx
(2)
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL=TRGx (over-frequencied), EXTEN=0x1 (rising edge), CONT=0
2. CHSEL=0xF, SCANDIR=0, AUTDLY=0, AUTOFF=0

Figure 30. Continuous conversions of a sequence, hardware trigger

(1)
ADSTART
EOC
EOSEQ
ADSTP
(1)
TRGx
(2)
ADC state
ADC_DR
by S/W
triggered
1. EXTSEL=TRGx, EXTEN=0x2 (falling edge), CONT=1
2. CHSEL=0xF, SCANDIR=0, AUTDLY=0, AUTOFF=0
182/742
RDY CH0
by H/W
ignored
RDY CH0 CH1
D0
by H/W
ignored
Doc ID 018940 Rev 1
CH1 CH2 CH3 RDY
D0 D1 D2 D3
CH2 CH3 CH0 CH1
D1 D2 D3 D0
CH0 CH1 CH2 CH3
D0 D1 D2
CH2 CH3 CH0 STOP
D1 D2 D3
RM0091
RDY
D3
RDY