Tim14 Register Map; Table 52. Tim14 Register Map And Reset Values - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
Table of Contents

Advertisement

RM0091
17.4.12

TIM14 register map

TIM14 registers are mapped as 16-bit addressable registers as described in the table below:
Table 52.
TIM14 register map and reset values
Offset
Register
TIM14_CR1
0x00
Reset value
Reserved
0x08
Reset value
TIM14_DIER
0x0C
Reset value
TIM14_SR
0x10
Reset value
TIM14_EGR
0x14
Reset value
TIM14_CCMR1
Output compare
mode
Reset value
0x18
TIM14_CCMR1
Input capture
mode
Reset value
Reserved
0x1C
Reset value
TIM14_CCER
0x20
Reset value
TIM14_CNT
0x24
Reset value
TIM14_PSC
0x28
Reset value
TIM14_ARR
0x2C
Reset value
Reserved
0x30
Reset value
TIM14_CCR1
0x34
Reset value
Reserved
0x38 to
0x4C
Reset value
0
0
0
0
Doc ID 018940 Rev 1
General-purpose timer (TIM14)
CKD
[1:0]
0
0
0
0
0
IC1F[3:0]
0
0
CNT[15:0]
0
0
0
0
0
0
0
0
0
PSC[15:0]
0
0
0
0
0
0
0
0
0
ARR[15:0]
0
0
0
0
0
0
0
0
0
CCR1[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OC1M
CC1S
[2:0]
[1:0]
0
0
0
0
0
0
IC1
CC1S
PSC
[1:0]
[1:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
373/742

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the STM32F05 series and is the answer not in the manual?

Questions and answers

Table of Contents