Table of Contents
Advertisement
Embedded Flash memory
3.5.6
Flash address register (FLASH_AR)
Address offset: 0x14
Reset value: 0x0000 0000
This register is updated by hardware with the currently/last used address. For Page Erase
operations, this should be updated by software to indicate the chosen page.
31
30
29
w
w
w
15
14
13
w
w
w
Bits 31:0 FAR: Flash Address
56/742
Bit 2 MER: Mass erase
Erase of all user pages chosen.
Bit 1 PER: Page erase
Page Erase chosen.
Bit 0 PG: Programming
Flash programming chosen.
28
27
26
25
w
w
w
w
12
11
10
9
w
w
w
w
Chooses the address to program when programming is selected, or a page to
erase when Page Erase is selected.
Note: Write access to this register is blocked when the BSY bit in the FLASH_SR
register is set.
Doc ID 018940 Rev 1
24
23
22
21
FAR[31:16]
w
w
w
w
8
7
6
5
FAR[15:0]
w
w
w
w
20
19
18
17
w
w
w
w
4
3
2
1
w
w
w
w
RM0091
16
w
0
w
Advertisement
Table of Contents
Need help?
Do you have a question about the STM32F05 series and is the answer not in the manual?
Questions and answers