Low Power Features; Wait Mode Conversion - STMicroelectronics STM32F05 series Reference Manual

RM0091
converted data from the ADC_DR register to the destination location selected by the
software.
Despite this, if an overrun occurs (OVR=1) because the DMA could not serve the DMA
transfer request in time, the ADC stops generating DMA requests and the data
corresponding to the new conversion is not transferred by the DMA. Which means that all
the data transferred to the RAM can be considered as valid.
Depending on the configuration of OVRMOD bit, the data is either preserved or overwritten
(refer to Section 12.6.2: ADC overrun (OVR, OVRMOD) on page
The DMA transfer requests are blocked until the software clears the OVR bit.
Two different DMA modes are proposed depending on the application use and are
configured with bit DMACFG in the ADC_CFGR1 register:
●
DMA one shot mode (DMACFG=0).
This mode should be selected when the DMA is programmed to transfer a fixed number
of data words.
●
DMA circular mode (DMACFG=1)
This mode should be selected when programming the DMA in circular mode or double
buffer mode.
DMA one shot mode (DMACFG=0)
In this mode, the ADC generates a DMA transfer request each time a new conversion data
word is available and stops generating DMA requests once the DMA has reached the last
DMA transfer (when a DMA_EOT interrupt occurs, see
controller (DMA) on page
When the DMA transfer is complete (all the transfers configured in the DMA controller have
been done):
●
The content of the ADC data register is frozen.
●
Any ongoing conversion is aborted and its partial result discarded
●
No new DMA request is issued to the DMA controller. This avoids generating an
overrun error if there are still conversions which are started.
● The scan sequence is stopped and reset
●
The DMA is stopped
DMA circular mode (DMACFG=1)
In this mode, the ADC generates a DMA transfer request each time a new conversion data
word is available in the data register, even if the DMA has reached the last DMA transfer.
This allows the DMA to be configured in circular mode to handle a continuous analog input
data stream.
12.7

Low power features

12.7.1

Wait mode conversion

Wait mode conversion can be used to simplify the software as well as optimizing the
performance of applications clocked at low frequency where there might be a risk of ADC
overrun occurring.
142) even if a conversion has been started again.
Doc ID 018940 Rev 1
Analog-to-digital converter (ADC)
183).
Section 10: Direct memory access
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