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RM0091
Table 55.
TIM15 register map and reset values (continued)
Offset
Register
TIM15_PSC
0x28
Reset value
TIM15_ARR
0x2C
Reset value
TIM15_RCR
0x30
Reset value
TIM15_CCR1
0x34
Reset value
TIM15_CCR2
0x38
Reset value
TIM15_BDTR
0x44
Reset value
TIM15_DCR
0x48
Reset value
TIM15_DMAR
0x4C
Reset value
Refer to
Section 2.2.2 on page 37
Doc ID 018940 Rev 1
General-purpose timers (TIM15/16/17)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
for the register boundary addresses.
PSC[15:0]
0
0
0
0
0
0
0
0
0
ARR[15:0]
0
0
0
0
0
0
0
0
0
REP[7:0]
0
0
0
0
CCR1[15:0]
0
0
0
0
0
0
0
0
0
CCR2[15:0]
0
0
0
0
0
0
0
0
0
LOCK
DT[7:0]
[1:0]
0
0
0
0
0
0
0
0
0
DBL[4:0]
0
0
0
0
0
0
DMAB[15:0]
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DBA[4:0]
0
0
0
0
0
0
0
0
421/742
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