Tim14 Functional Description; Time-Base Unit; Figure 137. General-Purpose Timer Block Diagram (Tim14) - STMicroelectronics STM32F05 series Reference Manual

General-purpose timer (TIM14)

Figure 137. General-purpose timer block diagram (TIM14)

TIMx_CH1
17.3

TIM14 functional description

17.3.1

Time-base unit

The main block of the programmable advanced-control timer is a 16-bit counter with its
related auto-reload register. The counter can count up. The counter clock can be divided by
a prescaler.
The counter, the auto-reload register and the prescaler register can be written or read by
software. This is true even when the counter is running.
The time-base unit includes:
●
Counter register (TIMx_CNT)
●
Prescaler register (TIMx_PSC)
●
Auto-reload register (TIMx_ARR)
The auto-reload register is preloaded. Writing to or reading from the auto-reload register
accesses the preload register. The content of the preload register are transferred into the
shadow register permanently or at each update event (UEV), depending on the auto-reload
preload enable bit (ARPE) in TIMx_CR1 register. The update event is sent when the counter
reaches the overflow and if the UDIS bit equals 0 in the TIMx_CR1 register. It can also be
generated by software. The generation of the update event is described in detailed for each
configuration.
The counter is clocked by the prescaler output CK_CNT, which is enabled only when the
counter enable bit (CEN) in TIMx_CR1 register is set (refer also to the slave mode controller
description to get more details on counter enabling).
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Internal clock (CK_INT)
CK_PSC
TI1FP1
TI1
IC1
Input filter &
edge detector
Doc ID 018940 Rev 1
Trigger
Controller
U
Autoreload register
Stop, Clear
CK_CNT
PSC CNT
+/-
prescaler counter
CC1I
U
IC1PS
Prescaler Capture/Compare 1 register
Notes:
Preload registers transferred
Reg
to active registers on U event
according to control bit
event
interrupt & DMA output
RM0091
TRGO
Enable
counter
UI
U
CC1I
output
OC1REF OC1
TIMx_CH1
control
ai17725b