Modbus Communication; Figure 236. Mute Mode Using Address Mark Detection - STMicroelectronics STM32F05 series Reference Manual

Advanced arm-based 32-bit mcus
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Universal synchronous asynchronous receiver transmitter (USART)
4-bit/7-bit address mark detection (WAKE=1)
In this mode, bytes are recognized as addresses if their MSB is a '1' otherwise they are
considered as data. In an address byte, the address of the targeted receiver is put in the 4 or
7 LSBs. The choice of 7 or 4 bit address detection is done using the ADDM7 bit. This 4-bit/7-
bit word is compared by the receiver with its own address which is programmed in the ADD
bits in the USART_CR2 register.
Note:
In 7-bit and 9-bit data modes, address detection is done on 6-bit and 8-bit addresses
(ADD[5:0] and ADD[7:0]) respectively.
The USART enters mute mode when an address character is received which does not
match its programmed address. In this case, the RWU bit is set by hardware. The RXNE flag
is not set for this address byte and no interrupt or DMA request is issued when the USART
enters mute mode.
The USART also enters mute mode when the MMRQ bit is written to 1. The RWU bit is also
automatically set in this case.
The USART exits from mute mode when an address character is received which matches
the programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been cleared.
An example of mute mode behavior using address mark detection is given in

Figure 236. Mute mode using address mark detection

In this example, the current address of the receiver is 1
(programmed in the USART_CR2 register)
RX
RWU
MMRQ written to 1
(RXNE was cleared)
25.5.8

ModBus communication

The USART offers basic support for the implementation of Modbus/RTU and Modbus/ASCII
protocols. Modbus/RTU is a half duplex, block transfer protocol. The control part of the
protocol (address recognition, block integrity control and command interpretation) must be
implemented in software.
The USART offers basic support for the end of the block detection, without software
overhead or other resources.
Modbus/RTU
In this mode, the end of one block is recognized by a "silence" (idle line) for more than 2
character times. This function is implemented through the programmable timeout function.
The timeout function and interrupt must be activated, through the RTOEN bit in the
USART_CR2 register and the RTOIE in the USART_CR1 register. The value corresponding
590/742
IDLE
Addr=0
Data 1
Data 2
Mute Mode
Non-matching address
Doc ID 018940 Rev 1
RXNE
RXNE
IDLE
Addr=1
Data 3 Data 4
Normal Mode
Matching address
RM0091
Figure
236.
RXNE
Addr=2
Data 5
Mute Mode
Non-matching address

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