RM0091
27.3.4
Charge transfer acquisition sequence
An example of a charge transfer acquisition sequence is detailed in
Figure 287. Charge transfer acquisition sequence
CLK_AHB
1
C
X
HiZ
0
1
C
S
HiZ
0
State
For higher flexibility, the charge transfer frequency is fully configurable. Both the pulse high
state (charge of C
be defined using the CTPH[3:0] and CTPL[3:0] bits in the TSC_CR register. The standard
range for the pulse high and low states duration is 500 ns to 2 µs. To ensure a correct
measurement of the electrode capacitance, the pulse high state duration must be set to
ensure that C
A dead time where both the sampling capacitor I/O and the channel I/O are in input floating
state is inserted between the pulse high and low states to ensure an optimum charge
transfer acquisition sequence. This state duration is 2 periods of f
At the end of the pulse high state and if the spread spectrum feature is enabled, a variable
number of periods of f
The reading of the sampling capacitor I/O, to determine if the voltage across C
reached the given threshold, is performed at the end of the pulse low state and its duration
is one period of f
charge transfer frequency
Discharge
Pulse high state
C
and C
(charge of C
)
X
S
X
) and the pulse low state (transfer of charge from C
X
is always fully charged.
X
are added.
SSCLK
.
HCLK
Doc ID 018940 Rev 1
Touch sensing controller (TSC)
Pulse low state
(charge transfer
from C
to C
)
X
S
Figure
287.
to C
) duration can
X
S
.
HCLK
has
S
685/742
t
Need help?
Do you have a question about the STM32F05 series and is the answer not in the manual?
Questions and answers