Lin (Local Interconnection Network) Mode - STMicroelectronics STM32F05 series Reference Manual

Universal synchronous asynchronous receiver transmitter (USART)
Parity generation in transmission
If the PCE bit is set in USART_CR1, then the MSB bit of the data written in the data register
is transmitted but is changed by the parity bit (even number of "1s" if even parity is selected
(PS=0) or an odd number of "1s" if odd parity is selected (PS=1)).
25.5.10

LIN (local interconnection network) mode

This section is relevant only when LIN mode is supported. Please refer to
USART implementation on page
The LIN mode is selected by setting the LINEN bit in the USART_CR2 register. In LIN mode,
the following bits must be kept cleared:
●
CLKEN in the USART_CR2 register,
●
STOP[1:0], SCEN, HDSEL and IREN in the USART_CR3 register.
LIN transmission
The procedure explained in
must be the same as for normal USART transmission with the following differences:
● Clear the M bit to configure 8-bit word length.
●
Set the LINEN bit to enter LIN mode. In this case, setting the SBKRQ bit sends 13 '0
bits as a break character. Then 2 bits of value '1 are sent to allow the next start
detection.
LIN reception
When LIN mode is enabled, the break detection circuit is activated. The detection is totally
independent from the normal USART receiver. A break can be detected whenever it occurs,
during Idle state or during a frame.
When the receiver is enabled (RE=1 in USART_CR1), the circuit looks at the RX input for a
start signal. The method for detecting start bits is the same when searching break
characters or data. After a start bit has been detected, the circuit samples the next bits
exactly like for the data (on the 8th, 9th and 10th samples). If 10 (when the LBDL = 0 in
USART_CR2) or 11 (when LBDL=1 in USART_CR2) consecutive bits are detected as '0,
and are followed by a delimiter character, the LBDF flag is set in USART_ISR. If the LBDIE
bit=1, an interrupt is generated. Before validating the break, the delimiter is checked for as it
signifies that the RX line has returned to a high level.
If a '1 is sampled before the 10 or 11 have occurred, the break detection circuit cancels the
current detection and searches for a start bit again.
If the LIN mode is disabled (LINEN=0), the receiver continues working as normal USART,
without taking into account the break detection.
If the LIN mode is enabled (LINEN=1), as soon as a framing error occurs (i.e. stop bit
detected at '0, which will be the case for any break frame), the receiver stops until the break
detection circuit receives either a '1, if the break word was not complete, or a delimiter
character if a break has been detected.
The behavior of the break detector state machine and the break flag is shown on the
Figure 237: Break detection in LIN mode (11-bit break length - LBDL bit is set) on page
Examples of break frames are given on
Framing error detection on page
592/742
573.
Section 25.5.2 has to be applied for LIN Master transmission. It
Figure 238: Break detection in LIN mode vs.
594.
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Section 25.4:
593.