Inter-integrated circuit (I
Figure 215. Transfer bus diagrams for I2C master transmitter
Example I2C master transmitter 2 bytes, automatic end mode (STOP)
NBYTES
INIT: program Slave address, program NBYTES = 2, AUTOEND=1, set START
EV1: TXIS ISR: wr data1
EV2: TXIS ISR: wr data2
Example I2C master transmitter 2 bytes, software end mode (RESTART)
NBYTES
INIT: program Slave address, program NBYTES = 2, AUTOEND=0, set START
EV1: TXIS ISR: wr data1
EV2: TXIS ISR: wr data2
EV3: TC ISR: program Slave address, program NBYTES = N, set START
494/742
2
C) interface
TXIS
TXIS
data1
S
Address
A
INIT
EV1 EV2
TXE
xx
TXIS TXIS
data1
S
Address
A
INIT
EV1
EV2
TXE
x
x
Doc ID 018940 Rev 1
data2
A
A
P
2
TC
data2
A
A
2
legend:
ReS
Address
EV3
RM0091
transmission
reception
SCL stretch
legend:
transmission
reception
SCL stretch
MS19862V1
Need help?
Do you have a question about the STM32F05 series and is the answer not in the manual?
Questions and answers